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- Path: informatik.tu-muenchen.de!fischerj
- From: fischerj@Informatik.TU-Muenchen.DE (Juergen "Rally" Fischer)
- Newsgroups: comp.sys.amiga.hardware,comp.sys.amiga.programmer
- Subject: Re: Blizzard 1230IV how good ?
- Followup-To: comp.sys.amiga.hardware,comp.sys.amiga.programmer
- Date: 23 Feb 1996 00:07:55 GMT
- Organization: Technische Universitaet Muenchen, Germany
- Distribution: world
- Message-ID: <4gj0gr$f5l@sunsystem5.informatik.tu-muenchen.de>
- References: <4eqhoj$nit@sunsystem5.informatik.tu-muenchen.de> <42116493@phoenix.owl.de> <1219.6615T886T2318@Redrobe.demon.co.uk> <4fnn4q$e19@sunsystem5.informatik.tu-muenchen.de> <42116524@phoenix.owl.de>
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-
- Frank Wille (frank@phoenix.owl.de) wrote:
- : Juergen "Rally" Fischer wrote on 12 Feb 1996 15:42:18 GMT
- : about "Re: Blizzard 1230IV how good ?" :
-
-
- : JF> |> >Type read write
- : JF> |> >Chip Ram 4553 kB/s 4566 kB/s
- : JF> |> >Fast Ram 11340 kB/s 6020 kB/s
- : JF>
- : JF> huh ? slower write in fastmem ? fastmem slower than a A1200 chipmem ?
-
- : Yes. This is the sad truth. First, I couldn't believe it either. :(
- : The slow writing into a 128k Fast buffer is caused by the 040's
- : data cache copyback mode. When I disable data cache, I get 10.6
- : MB/sec both for reading and writing.
-
- I guess you do linear write ? why copyback makes it slower ?
- is it useful for average code ? copyback means "will be written
- back to mem some time, and maybe in different order", right ?
-
- : JF> could you please also test (a0)+,(a1)+ which might give different
- : JF> timings than (a0)+,dn & dn,(a1)+ ?
-
- : I enhanced my little utility today, implementing copy- and ROM read
- : tests. It will be on Aminet, replacing the old version, in the next
- : days.
-
- mhm I got additional ideas:
-
- testing free cycles :) i.e. adding up to 3x add.l d0,d0 after a write.
- Are there free cycles after a write to fastmem on A4000?
-
- on 020 there are 2 free cycles after a move.l Dn,(an)+!!!
-
- i.e. a write is generally done in 2 cycles, both in chip or fast.
- but if next instruction also acesses mem, you get additional cycles.
-
- btw measuring 6 cycles for a copy on 020 already includes free cycles
- (020 working on next copy instruction while doing the buffered write).
-
- : Running it on my 4000/040 with Cybervision screen mode (i.e. *no*
- : bitplane DMA at all), it looks like this:
-
- : Type read write copy
- : Chip RAM 4554 kB/s 4566 kB/s 2283 kB/s
- : Fast RAM 11333 kB/s 6022 kB/s 4000 kB/s
- : ROM 11300 kB/s - -
-
- I really got to add the timings of A1201, because it's so much fun
- to overtake a Mercedes with a Volkswagen :))
-
- read write copy
- chip 4.1 mb/sec 6.6 mb/sec (hehe) 3.4mb/sec
- fast 8.4 mb/sec 12.6 mb/sec :)))) A1200 rulz 8.4mb/sec (hehe!)
-
- CHIPdma was 2 planes hires, if I remember right, and it's all very
- inaccurate, but the timings are about that.
-
- I'd really be interested, how fast my 020 can aproach a A4000 when
- doing a megafake routine that is to do texturemapping. Due to the
- fact that it does almost just memcopy it myabe will compete well.
-
- unroll this:
-
- move.b (a0,d0.w),(a1)+
- addx.l d1,d0
-
- should do about 1.2 mb/sec on A1201 vs. 2.1 mb/sec for plain
- bytewise copy.
-
- could you maybe add this "fakemapper", too ? :)
- or the real-linear mapper:
-
- move.w d1,d6
- move.b d0,d6
- move.l d6,a0
- move.b (a0)+,(a1)+
- addx.l d2,d0
- addx.l d3,d1
-
- well, the problem about the mappers is they're dependend on how they
- read from mem. just put $00000000 in d2 and $02000100 in d3 (dx=2/256,
- dy=1)
-
- and uhm.. $16 into d1 of the fakemapper example.
-
- : -- _
- : _ // Frank EMail: frank@phoenix.owl.de
- : \X/ IRC: Phx @ #amiga(ger)
-
-